Sites
Tags
- A
- Abstract machine
- ACPI
- Adapteva
- Adder
- Address generation unit
- Addressing mode
- Advanced Power Management
- AI accelerator
- Alternating Turing machine
- AMD
- Analogue electronics
- Apollo Guidance Computer
- Application-specific integrated circuit
- Arithmetic logic unit
- ARM architecture
- Automatic Reference Counting
- Automatic variable
- Auxiliary memory
- Barrel shifter
- Baseband processor
- Bit-level parallelism
- Bit-serial architecture
- Bit slicing
- Boolean circuit
- Branch predictor
- Bubble
- Buffer overflow
- Buffer over-read
- Bus
- Cache
- Cache coherence
- Cache hierarchy
- Cache replacement policies
- C dynamic memory allocation
- Cellular automaton
- Central processing unit
- Circuit
- Clock gating
- Clock rate
- Clock signal
- Cognitive computing
- Combinational logic
- Compaq
- Complex instruction set computing
- Computer architecture
- Computer data storage
- Computer performance
- Content-addressable memory
- Context switch
- Control register
- Control unit
- Cooperative multitasking
- Coprocessor
- Counter
- CPU cache
- CPU multiplier
- Dangling pointer
- Data buffer
- Data dependency
- Data parallelism
- Datapath
- DEC Alpha
- Demand paging
- Demultiplexer
- Deterministic finite automaton
- Digital electronics
- Digital signal processor
- Distributed computing
- DOI
- Dynamic frequency scaling
- Dynamic voltage scaling
- Electronic circuit
- Embedded system
- Endianness
- Exception handling
- Execution unit
- Explicitly parallel instruction computing
- Fabric computing
- False sharing
- Field-programmable gate array
- FIFO
- Finalizer
- Finite-state machine
- Floating-point unit
- Flops
- Fragmentation
- Garbage
- Garbage collection
- Gate array
- General-purpose computing on graphics processing units
- Glue logic
- Graphics processing unit
- Hardware acceleration
- Hardware register
- Hardware security module
- Harvard architecture
- Hazard
- Heterogeneous computing
- Heterogeneous System Architecture
- Hypercomputation
- Hyper-threading
- IA-64
- IBM System/390 ES/9000 Enterprise Systems Architecture ESA family
- Image processor
- Input–output memory management unit
- Instruction cycle
- Instruction-level parallelism
- Instruction pipelining
- Instruction set architecture
- Instructions per cycle
- Instructions per second
- Integrated circuit
- Intel
- Intel 80386
- Intel 80486
- International Standard Book Number
- Itanium
- Kernel
- Load–store unit
- Logic gate
- M32R
- Manual memory management
- Manycore processor
- Meltdown
- Memory address register
- Memory controller
- Memory hierarchy
- Memory leak
- Memory management
- Memory management unit
- Memory paging
- Memory safety
- Memory segmentation
- Microarchitecture
- MicroBlaze
- Microcode
- Microcontroller
- Microprocessor
- MIMD
- MIPS architecture
- Mixed-signal integrated circuit
- Mobile processor
- Model of computation
- Motorola 68000 series
- Multi-chip module
- Multi-core processor
- Multiplexer
- Multiprocessing
- Multithreading
- Nehalem
- Network on a chip
- Network processor
- Neuromorphic engineering
- New and delete
- No instruction set computing
- Non-deterministic Turing machine
- Non-uniform memory access
- OpenRISC
- Operand forwarding
- Operating system
- Out-of-order execution
- Page
- Page fault
- Page table
- Paging
- Parallel computing
- Pentium Pro
- Performance per watt
- Physical address
- Pin grid array
- Post–Turing machine
- Power management
- Power management integrated circuit
- Power Management Unit
- PowerPC
- PowerPC 600
- Preemption
- Prentice Hall
- Probabilistic Turing machine
- Process
- Processor
- Processor design
- Processor register
- Program counter
- Programmable Array Logic
- Protected mode
- Quantum circuit
- Quantum computing
- Quantum Gate
- Quantum Turing machine
- Random-access machine
- Real mode
- Redox
- Reduced instruction set computer
- Reference counting
- Region-based memory management
- Register file
- Register machine
- Register renaming
- Re-order buffer
- Reservation station
- RISC-V
- ROM image
- Scratchpad memory
- Secure cryptoprocessor
- Segment
- Semiconductor device fabrication
- Sequential logic
- Simd
- Simultaneous multithreading
- Single-core
- Skylake
- SPARC
- Speculative execution
- SPMD
- Stack machine
- Stack Overflow
- Static variable
- Status register
- Stored-program computer
- Stream processing
- Sun Microsystems
- SuperH
- Superscalar processor
- SUPS
- SWAR
- Switch
- System on a chip
- Tables
- Task parallelism
- Tensor processing unit
- The Daily Dot
- Thrashing
- Thread
- Three-dimensional integrated circuit
- TLB
- Tom's Hardware
- Tracing garbage collection
- Transactions per second
- Transistor count
- Turing machine
- Unicore
- Universal Turing machine
- Unreachable memory
- V
- Vax
- Vector processor
- Very long instruction word
- Virtual 8086 mode
- Virtual address space
- Virtual memory
- Virtual memory compression
- Von Neumann architecture
- Weak reference
- Westmere
- Working set
- Write buffer
- X86
- X86-64
- X86 memory segmentation
- X86 virtualization
- Z/Architecture
- Zero instruction set computer