Tags
- A
- Abstract machine
- ACPI
- Adapteva
- Adder
- Address decoder
- Address generation unit
- Addressing mode
- Advanced Power Management
- AI accelerator
- Alternating Turing machine
- Analogue electronics
- Apollo Guidance Computer
- Application-specific integrated circuit
- Arithmetic logic unit
- Auxiliary memory
- Barrel shifter
- Baseband processor
- Binary decoder
- Bit-level parallelism
- Bit-serial architecture
- Bit slicing
- Boolean circuit
- Branch
- Branch predictor
- Bubble
- Bus
- Butler Lampson
- Cache
- Cache coherence
- Cache hierarchy
- Cache replacement policies
- CAS latency
- Cellular architecture
- Cellular automaton
- Central processing unit
- Chip carrier
- Circuit
- Clock gating
- Clock rate
- Clock signal
- Cognitive computing
- Combinational logic
- Compiler
- Complex instruction set computing
- Complex programmable logic device
- Computer
- Computer architecture
- Computer data storage
- Computer engineering
- Computer performance
- Concurrency
- Control unit
- Cooperative multitasking
- Coprocessor
- Counter
- CPU
- CPU cache
- CPU multiplier
- Cyber-attack
- Data
- Data buffer
- Data dependency
- Dataflow architecture
- Data parallelism
- Datapath
- Data stream
- DEC Alpha
- Demultiplexer
- Deterministic finite automaton
- Digital electronics
- Digital Equipment Corporation
- Digital signal processor
- Distributed computing
- DOI
- Downfall
- Dynamic frequency scaling
- Dynamic voltage scaling
- Eager evaluation
- Electronic circuit
- Embedded system
- Encryption
- Encryption keys
- Endianness
- Execution unit
- Explicitly parallel instruction computing
- Exponential growth
- Fabric computing
- Field-programmable gate array
- FIFO
- Finite-state machine
- Floating-point unit
- Flops
- Foreshadow
- Gate array
- General-purpose computing on graphics processing units
- Glasgow Haskell Compiler
- Glue logic
- Graphics processing unit
- Hardware acceleration
- Hardware register
- Hardware security module
- Harvard architecture
- Haskell
- Hazard
- Heterogeneous computing
- Heterogeneous System Architecture
- H. T. Kung
- Hypercomputation
- Hyper-threading
- IA-64
- IBM System/360 architecture
- IBM System/370
- IBM System/390 ES/9000 Enterprise Systems Architecture ESA family
- Image processor
- Insights
- Instruction
- Instruction cycle
- Instruction-level parallelism
- Instruction pipelining
- Instruction set architecture
- Instructions per cycle
- Instructions per second
- Integrated circuit
- Intel Core
- International Standard Book Number
- Lazy evaluation
- Leak
- Little man computer
- LLVM
- Load–store unit
- Logic gate
- Loongson
- M32R
- Manycore processor
- Meltdown
- Memory address register
- Memory controller
- Memory hierarchy
- Memory management unit
- Microarchitecture
- MicroBlaze
- Microcode
- Microcontroller
- Microprocessor
- MIMD
- MIPS architecture
- Mixed-signal integrated circuit
- Mobile processor
- Model of computation
- Motorola 68000 series
- Multi-chip module
- Multi-core processor
- Multiplexer
- Multiprocessing
- Multithreading
- Nettop
- Network on a chip
- Network processor
- Neuromorphic engineering
- New
- No instruction set computing
- Non-deterministic Turing machine
- Non-uniform memory access
- OpenRISC
- Operand forwarding
- Optimistic concurrency control
- Optimization
- Out-of-order execution
- Pac-Man
- Parallel computing
- Performance per watt
- Physics processing unit
- Pin grid array
- Pipeline
- PostScript
- Post–Turing machine
- Power management
- Power management integrated circuit
- Power Management Unit
- PowerPC
- Preemption
- Privilege
- Probabilistic Turing machine
- Process
- Processor
- Processor design
- Processor register
- Program counter
- Quantum circuit
- Quantum computing
- Quantum Gate
- Quantum Turing machine
- Random-access machine
- Random-access memory
- Reduced instruction set computer
- Register file
- Register machine
- Register renaming
- Relational database management system
- Re-order buffer
- Reservation station
- Resource
- RISC-V
- ROM image
- Runahead
- Scratchpad memory
- Secure cryptoprocessor
- Security
- Semiconductor device fabrication
- Sequential logic
- Simd
- Simultaneous multithreading
- Single-core
- Single instruction, multiple threads
- Slipstream
- Soft microprocessor
- Software Guard Extensions
- SPARC
- SPECTRE
- Speculative execution
- SPMD
- Spoiler
- Stack machine
- Stack register
- Status register
- Stored-program computer
- Stream processing
- SuperH
- Superscalar processor
- SUPS
- SWAR
- Switch
- System on a chip
- Target
- Targets
- Task parallelism
- Tensor processing unit
- Texa
- Thread
- Three-dimensional integrated circuit
- Transactions per second
- Transistor count
- Translation lookaside buffer
- Trustworthy computing
- Turing machine
- UML state machine
- Under Attack
- Unicore
- Universal Turing machine
- Updates
- Vax
- Vector processor
- Very long instruction word
- Virtual memory
- Vision processing unit
- Von Neumann architecture
- Vulnerability
- WebKit
- Weekly
- Wide-issue
- Write buffer
- X86
- Z/Architecture
- Zero instruction set computer